The 4 MSBs of HIFREQ1 (fhi[15:12]) are the integer
portion of the divider, excluding offset of 16. The 12
LSBs (fhi[11:0]) are the fractional part of the divider.
300MHz to 450MHz Frequency-Programmable
ASK/FSK Transmitter
______________________________________________________________________________________   15
DECIMAL
BINARY
CRYSTAL FREQUENCY DIVIDED BY
0
000
1
1
001
2
2
010
4
3
011
8
4-7
1XX
16
Table 6. ckdiv[2:0] of Configuration 0 Register (Address: 0x01)
BIT
NAME
FUNCTION
7-0
fhi[15:8]
8-bit upper byte of high-frequency divider for FSK
Table 7. High-Frequency 1 Register (Address: 0x02)
BIT
NAME
FUNCTION
7-0
fhi[7:0]
8-bit lower byte of high-frequency divider for FSK
Table 8. High-Frequency 0 Register (Address: 0x03)
BIT
NAME
FUNCTION
7-0
flo[15:8]
8-bit upper byte of low-frequency divider for FSK/ASK
Table 9. Low-Frequency 1 Register (Address: 0x04)
BIT
NAME
FUNCTION
7-0
flo[7:0]
8-bit lower byte of low-frequency divider for FSK/ASK
Table 10. Low-Frequency 0 Register (Address: 0x05)
DECIMAL VALUE
fhi[15:12], flo[15:12]
fhi[11:0], flo[11:0]
12.0220
0xC
0x05A
2.9536
0x2
0xF42
Table 11. Maximum and Minimum Values for Frequency Divide
The 4 MSBs of LOFREQ1 (flo[15:12]) are the integer
portion of the divider, excluding offset of 16. The 12
LSBs (flo[11:0]) are the fractional part of the divider.
Valid values for the divider are shown in Table 11.
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